(ICTSM) INFORMATION & COMMUNICATION TECHNOLOGY SYSTEM MAINTENANCE 1st Year WEEK WISE NSQF SYLLABUS (SPILT UP)

WEEK. NO. 13

1. Reference Learning Outcome :- Assemble and test various Power Supply circuit. (NOS: SSC/N9415)
2. Duration :- Professional Skill 32  Hrs; Professional Knowledge 08  Hrs  (for above learning out come)

TRADE THEORY (Professional Knowledge ) :- 

• • Unregulated, regulated DC Power supply specifications.
  • Application of different types of power supply for specific application types.
  • Short circuit protection.
  • Overload protection.
  • Fixed Voltage regulators using IC’s.
  • Variable voltage regulators using IC’s.
  • Inverters and converters.
  • Un-interrupted power supply, types and applications.

TRADE PRACTICAL (Professional Skills  With Indicative Hours) :- Job no. & Name of the Practical

• Power supply
• 48. Practice on identifying and using the controls on a regulated power supply. (3 hrs)
• 49. Assemble and test a fixed voltage regulator using 3pin IC. (7 hrs)
• 50. Assemble and test a variable voltage regulator using IC. (8 hrs)
• 51. Assemble a simple inverter and converter for use with emergency lamp. (8 hrs)
• 52. Identify the parts and controls of a UPS. Practice switch-on and switch-off procedures. (6 hrs)

WEEK. NO. 14 

1. Reference Learning Outcome :- Construct all digital circuit using logic gates and verify truth table. (NOS: SSC/N9416)
2. Duration :- Professional Skill 50 Hrs; Professional Knowledge 14  Hrs  (for above learning out come)

TRADE THEORY (Professional Knowledge ) :- 

• • Number systems and conversions.
  • Classification of digital IC’s. Use of data book for identification of digital IC’s.
  • Basic LOGIC GATES and truth table.
  • Boolean algebra.
  • Logic families, logic levels, propagation delay.
  • Multiple input gates.
  • XOR, XNOR gates and application.
  • Simplification of Boolean equations.
  • Combinational logic circuits. g) Half adder, full adder, parallel binary adder, half subtractor, fullsubtractor.

TRADE PRACTICAL (Professional Skills  With Indicative Hours) :- Job no. & Name of the Practical

• Digital Electronics
• 53. Identify the specifications of given digital IC’s referring to data books. (2 hrs)
• 54. Verify the truth table of two input OR, NOR, AND, NAND, NOT gates. (3 hrs)
• 55. Verify of truth table of multiple input logic gates. (3 hrs)
• 56. Verify the truth table of XOR and XNOR Gates. (3 hrs)
• 57. Realization of different gate type using NAND gates. (3 hrs)
• 58. Verification of Boolean laws. (3 hrs)
• 59. Realization of half adder & full adder using NAND gates. Realization half subtractor and full subtractor using NAND gates. (3 hrs)
• 60. Verification of truth table of 7483- 4bit adder. (3 hrs)
• 61. Verifying encoder/ decoder/ multiplexer/ demultplexer IC truth tables. (3 hrs)

WEEK. NO. 15 

1. Reference Learning Outcome :- Construct all digital circuit using logic gates and verify truth table. (NOS: SSC/N9416)
2. Duration :- Professional Skill 50 Hrs; Professional Knowledge 14  Hrs  (for above learning out come)

TRADE THEORY (Professional Knowledge ) :- 

• • Commercially available adders/ subtractors.
  • Comparator, decoders, encoders, multiplexer, demultiplexer.
  • Parity generators / checkers.
  • RS Flip – Flop, JK flip-flop, Master- Slave flip-flops.
  • Types of triggering and applications. D flip-flops.
  • Counters, ripple, synchronous, up-down, scale-n counters.
  • Principles of A/D & D/A converter.
  • Commercially available A/D & D/A converters. Applications.
  • Shift registers. Types, applications.
  • Commercially available shift registers and applications.
  • Conversion of serial data into parallel and vice-versa.
  • Concept of Karnaugh Map (K-Map).

TRADE PRACTICAL (Professional Skills  With Indicative Hours) :- Job no. & Name of the Practical

• 62. Realization and verification of truth table of RS, JK and MS- JK flip-flop. (3 hrs)
• 63. Realization and verification of D-flip flop. (3 hrs)
• 64. Realization and verification of up & down (sync/async) counter. (3 hrs)
• 65. Verification of A/D & D/A converter. (3 hrs)
• 66. Realization of shift registers using FF. (3 hrs)
• 67. Verification of Right-shift, Left- shift registers. (3 hrs)
• 68. Verification of Serial-in-parallel out and parallel in serial out of data. (3 hrs)
• 69. Representation of logic function’s truth table using K-Map. (3 hrs)